1. Field of the Invention
The present invention related to a method for manufacturing a semiconductor device and to a semiconductor device. In particular, the present invention relates to a method for manufacturing a high-speed low-power field effect transistor having silicide source and drain electrodes (hereinafter referred to as MOSFET).
2. Description of the Related Art
To minimize the electrical resistance of the source and drain electrodes of a MOSFET, a method has been proposed wherein an upper portion of source/drain region is reacted with a metal such as Co, Ti or Ni (to form silicides thereof). However, these metal atoms are prone to rapidly diffuse into a silicon substrate during the silicide formation or in a subsequent step of heat treatment. Accordingly, when a shallow junction is formed in the source/drain region, the metals thus diffused can reach the junction, thus giving rise to leakage at the junction.
To suppress junction leakage associated with Co silicidation, N2 implantation prior to CoSi2 formation is proposed. However, in order to achieve sufficient leakage suppression, high dose N2 implantation more than 1×1015 cm−2 is required. Since N (nitrogen) is an n-type impurity in a silicon substrate, if such a high dose of N2 is implanted, the impurity concentration of the source/drain region of a p-type MOSFET will be compensated or disrupted by the n-type impurity thus ion-implanted. Therefore, pre-silicide ion-implantation of N2 is not suited for manufacturing a CMOS circuit.
There has been also proposed the measures wherein F (fluorine) is ion-implanted in order to selectively reduce the reaction speed of TiSi2 formation on the source/drain region where F is implanted exclusively, thereby resulting in a thin TiSi2 on the source/drain region compared to TiSi2 formed on a gate electrode, thus, suppressing the generation of junction leakage, while maintaining thick TiSi2 on the gate electrode. Also, regarding to the F implantation prior to TiSi2 formation, creation of a gettering region by presilicide F implantation is proposed to trap Ti-containing metal impurities that might be released in the process of TiSi2 formation, thereby suppressing junction leakage.
Besides CoSi2 and TiSi2, regarding to NiSi, it has been found out by the present inventor that thermal instability of NiSi induces substantial leakage current even after a heat treatment as low as 500° C. It has been also found out that, unless the annealing temperature is lowered below 450° C., the leakage generation cannot be avoided. Notably, however, LSI fabrication below such a low temperature of 450° C. may significantly reduce the throughput of the production and, thus, impair manufacturability of the devices and impose cost disadvantage.
As explained above, no one has yet succeeded in finding a stable and cost-efficient method for NiSi formation, which is capable of fully securing the advantages of silicide formation without suffering associated disadvantages such as junction leakage generation or severe restriction on the fabrication temperature.